By Mika M. Nystrom, Alain Martin
"Asynchronous Pulse common sense is a entire research of a newly constructed asynchronous circuit kinfolk. The ebook covers circuit conception, functional circuits, layout instruments and an instance of the layout of an easy asynchronous microprocessor utilizing the circuit relatives. Asynchronous Pulse common sense can be of curiosity to the economic and educational researcher engaged on high-speed VLSI structures. Graduate scholars will locate this an invaluable reference for computer-aided layout of asynchronous or comparable VLSI structures.
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Additional info for Asynchronous Pulse Logic
We shall first study the designing and simulating of a basic pulsed asynchronous circuit, viz. the pulse repeater. This will be an ad hoc discussion based on properties easily observable by and well-known to the electrical engineer: pulse lengths3 (widths) and heights. Secondly, we shall explore why these simple and readily observable properties are not enough for describing the full range of possible pulse-repeater behaviors. Simply speaking, the essential shortcoming of the pulse length and pulse height is that these two properties, while they may suffice for specifying a testing pulse that is applied to a circuit, do not suffice for completely describing the shape of the output waveform produced by that circuit.
Is it really true that the output pulse will have the characteristics implied by the location of X, almost regardless of the characteristics of the input pulse? Yes, it is. 6. 85 ns. 0 delays. Since the range of input pulse lengths comfortably contains the range of output pulse lengths, we should have to add considerable load, or we should have to fall victim to extreme manufacturing variations to make the pulse either die out or double up as it travels down a pipeline of pulse repeaters of this kind.
This generalizing serves two purposes: on the one hand, it establishes a framework that we can understand the logic family of Chapters 4 and 2 within; on the other hand, it serves the wider purpose of taking a baby step towards establishing a formal model for the functioning of asynchronous circuits with the simple understandability of the synchronous model. The mathematical argument in this section may seem overly formal, but it is really a straightforward generalization of the synchronous argument.